MIPS Technologies Launches System-Level Solution to Increase Overall SOC Performance

SOC-it(TM) System Controller Optimized for MIPS® Cores Includes Integrated Memory Controller and Other Features That Accelerate SOC Design Cycle

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--July 29, 2002-- MIPS Technologies, Inc. (Nasdaq:MIPS - News; Nasdaq:MIPSB - News) today announced a new system controller family that complements the high performance of MIPS® processor cores, enabling SOC designers to increase overall system performance for next-generation applications and accelerate SOC development. SOC-it(TM) system controllers have already been licensed to several customers, including NEC and leading providers of networking, satellite communications and set-top box solutions.

The SOC-it system controller family is one more step in MIPS Technologies' strategy to offer system platforms that enable customers to get to market faster with higher performance system-level products. SOC-it system controllers feature an integrated memory controller optimized to take full advantage of the MIPS core in the SOC design. They also include multiple, high-bandwidth, dual-port interfaces to IP (intellectual property) blocks and modular bridges that provide access to industry-standard buses and customer IP. The result is a complete system-level solution that offers significantly higher performance than other standard system controllers, up to 100 percent memory bandwidth efficiency, and very low memory latency.

"High-bandwidth features and functionality such as digital streaming media that enhance a user's experience are creating a huge demand for higher system performance in a broad range of embedded systems. The SOC-it controller family delivers that performance by giving our customers a very flexible, cost-effective, industry-standard solution for quickly moving very high volumes of data across the entire SOC platform," said Kevin Meyer, vice president of marketing at MIPS Technologies.

Features

SOC-it system controllers increase system performance largely by means of an integrated memory controller and multiple, high-bandwidth IP interfaces. The memory controller is optimized for, and closely coupled with, the MIPS core in the SOC. It delivers up to 100 percent memory bandwidth efficiency, and latency is as low as 8-1-1-1 system clocks. In addition, it supports industry-standard DRAM interfaces, including PC100 and PC133 for cost-sensitive applications, and DDR200 and DDR266 for high-performance applications.

Three dual-port IP interfaces offer high-bandwidth, point-to-point switched bus interconnects. The dual-port design concept, traditionally found in high-performance SRAM, is a rarity in SOCs; and point-to-point interconnects typically are only found in very high-performance network switches. They are featured in SOC-it controllers because they enable the CPU to access a peripheral while another peripheral simultaneously accesses the memory controller, unlike solutions that utilize a non-scalable, shared bus architecture. Also included are modular bridges to industry-standard buses such as AMBA® AHB and PCI that help preserve customers' existing IP blocks.

SOC-it controllers are synthesizable and available in five upgradable configurations:

• SOC-it EC-32 Lite and SOC-it EC-64 Lite system controllers, which are optimized for the MIPS32 4K(TM) and 4KE(TM) and MIPS64 5K(TM) core families, include a single data rate (SDR) memory controller, interrupt controller, three dual-port IP interfaces, an AHB interface, and a peripheral bus controller.
• SOC-it EC-32 Deluxe and SOC-it EC-64 Deluxe controllers offer the same features as SOC-it Lite controllers plus double data rate (DDR) support in the memory controller and PCI bus bridges.
• The SOC-it MGB(TM) Deluxe controller offers the same features as SOC-it EC-32/64 Deluxe controllers but is optimized for the highest performance MIPS core, the MIPS64 20Kc(TM) core, which includes the MGB bus.

Availability

All versions of the SOC-it system controllers are available now.

About MIPS Technologies

MIPS Technologies, Inc. is a leading provider of industry-standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers and system OEMs. MIPS Technologies and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. The company is based in Mountain View, Calif., and can be reached at 650/567-5000 or www.mips.com.

MIPS® is a registered trademark in the United States and other countries, and SOC-it(TM), MIPS32(TM), MIPS64(TM), 4K(TM), 4KE(TM), 5K(TM), 20Kc(TM), MGB(TM) and MIPS-based(TM) are trademarks of MIPS Technologies, Inc. AMBA® is a registered trademark of ARM Ltd. All other trademarks referred to herein are the property of their respective owners.

     MIPS Technologies, Inc.
     Lee Garvin Flanagin, 650/567-5180
     flanagin@mips.com